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  ________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 1 / 1 4 u m805/811/812 4 - pin p voltage monitors with manual reset input um805/811/812 sot143 general description the um 8 05/8 11/812 are low - power microprocessor (p) supervisory circuits used to monitor power supplies in p and digital systems. they provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5v - powered or 3v - powered circuits. the um805/ 811/812 also provide a debounced manual reset input. these devices perform a single function: they assert a reset signal whenever the v cc supply voltage falls below a preset threshold, keeping it asserted for at least 140ms after v cc has risen above the reset threshold. reset thresholds are available for operation with a variety of supply voltages. the um 80 5 has an open - drain output stage, while the um 8 11 /81 2 have push - pull outputs. the um 80 5 s open - drain reset _____________ output requires a pull - up resistor that can be connected to a voltage higher than v cc . the um 8 05 /8 11 have an active - low reset _____________ output, while the um 81 2 has an active - high reset output. the reset comparator is designed to ignore fast transient s on v cc , and the outputs are guaranteed to be in the correct logic state for v cc down to 1v. low supply current makes the um805/ 811/812 ideal for use in portable equipment s . the devices come in a 4 - pin sot143 package. applications features ? computer s ? controllers ? portable/battery - powered e quipment s ? intelligent i nstrument s ? critical p and c power monitoring ? no external c omponents ? v cc transient i mmunity ? correct l ogic o utput g uaranteed to v cc =1.0 v ? precision v cc monitoring of 3.0v, 3.3v and 5.0v s upplies ? 2 a supply current ? 140ms min imum power - on reset pulse width ? guaranteed over tempe rature ? a vailable in 3 o utput c onfigurations : open - drain a ctive - low reset __________ o utput( um 80 5 ) push - pull active - low reset __________ output( um811 ) push - p ull a ctive - high r eset o utput( um 81 2 ) ? 4 - pin sot143 package ? wide o peration temperature: - 40 c to + 85 c
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 2 / 1 4 u m805/811/812 pin configurations top view ordering information um8 xx z p xx: output type =0 5 open - d rain active low =11 push - p ull active low =12 push - p ull active high z: reset threshold (v) =l 4.63 =m 4.38 =j 4.00 =t 3.08 =s 2.93 =r 2.63 =z 2.32 p: package type = e sot143 typical operating circuit ( ) are for um812 m: month code um 805/ 811 /812 sot143 v c c u m 8 0 5 u m 8 1 1 u m 8 1 2 g n d r e s e t ( r e s e t ) v c c g n d r e s e t i n p u t v c c m r p u s h b u t t o n s w i t c h p r p u l l u p * * u m 8 0 5 o n l y ( ) a r e f o r u m 8 1 2 1 2 3 4 g n d r e s e t ( r e s e t ) m r v c c 1 2 3 4 m x x x
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 3 / 1 4 u m805/811/812 pin description pin number pin name function 1 gnd ground 2 reset ______________ (um805/811) a ctive - low reset output. reset _____________ remains low while v cc is below the reset threshold or while mr _______ is held low. it remains low for the reset active timeout period (t rp ) after the reset conditions are terminated. see figure 1. um811: cmos push - pull output (sources and sinks current) um805: open - drain , a ctive lo w , nmos output (sinks current only). connect a pull - up re sistor from reset ______________ to any supply voltage up to 6v. reset (um812) active - high reset output. reset remains high while v cc is below the reset threshold or while mr _______ is held low . reset remains high for reset active timeout period (t rp ) after the reset conditions are terminated. 3 mr _______ manual r eset input. a logic low on mr _______ asserts reset. reset remains asserted as long as mr _______ is low and for 240 ms after mr _______ returns high. this active - low input has an internal 20k pull - up resistor. it can be driven from a ttl or cmos - logic line, or shorted to ground with a switch. leave open if unused. see figure 2. 4 v cc +5v, +3.3v, or +3v supply voltage absolute maximum ratings (note 1) s ymbol p arameter v alue u nit v cc supply voltage - 0.3 to +6.0 v reset, reset _____________ (push - pull) - 0.3 to (v cc +0.3) reset _____________ (open - drain) - 0.3 to +6.0 i cc input current , v cc , mr _______ 20 ma i o output current , reset , reset _____________ 20 ma p d continuous power dissipation ( derate 4mw/c above 70c ) 320 mw t a operating temperature range - 40 to + 105 c t stg storage temperature range - 65 to + 1 6 0 c lead temperature (soldering, 10s) + 300 c note 1: stresses bey ond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the spec ifications are not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 4 / 1 4 u m805/811/812 electrical characteristics (v cc = 5v for l/m/j versions, v cc = 3.3v for t/s versions, v cc = 3v for r version, and v cc = 2.5v for z version, t a = - 40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 2 ) symbol parameter conditions min typ max unit v cc supply voltage range t a =0 c to +70 c 1.0 5.5 v i cc supply current 2 .0 5.0 a v th+ reset threshold l version t a =+25 4.5 6 4.63 4.7 0 v t a = - 40 to + 85 4.50 4.75 m version t a =+25 4.31 4.38 4.45 t a = - 40 to + 85 4.25 4.50 j version t a =+25 3.93 4.00 4.06 t a = - 40 to + 85 3.89 4.10 t version t a =+25 3. 04 3.08 3.11 t a = - 40 to + 85 3.00 3.15 s version t a =+25 2.89 2.93 2.96 t a = - 40 to + 85 2.85 3.00 r version t a =+25 2.59 2.63 2.66 t a = - 40 to + 85 2.55 2.70 z version t a =+25 2.28 2.32 2.35 t a = - 40 to + 85 2.25 2.38 reset threshold tempco 150 ppm/ c v cc to reset delay (note 3) 1 0 s t rp reset active timeout period 140 240 560 ms t mr mr ______ minimum pulse width 10 s mr ______ glitch immunity (note 4) 100 ns t md mr ______ to reset propagation delay 0.5 s v ih mr ______ input threshold v cc > v th (max) um805/811/812l e /m e /j e 2.3 v v il 0.8 v ih v cc > v th (max) um805/811/812t e /s e /r e /z e 0.7v cc v il 0.25v cc mr ______ pull - up r esistance 10 20 30 k
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 5 / 1 4 u m805/811/812 electrical characteristics (continued) (v cc = 5v for l/m/j versions, v cc = 3.3v for t/s versions, v cc = 3v for r version, and v cc = 2.5v for z version, t a = - 40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 2 ) symbol pa rameter conditions min typ max unit v oh reset output voltage i source =150a, 1.8vv th(max) um811t e /s e /r e /z e 0.8v cc v i source =800a, v cc >v th(max) um811l e /m e /j e v cc - 1.5 v ol i sink =1.2ma, v cc =v th(min) um805/811t e /s e /r e /z e 0.3 i sink =3.2ma, v cc =v th( min) um805/811l e /m e /j e 0.4 i sink =50a, v cc >1.0v 0.3 note 2 : production testing done at t a = +25c; limits over temperature g uaranteed by design only. note 3 : reset _____________ ou tput for um 80 5/811 ; reset output for um 81 2 . note 4 : glitches of 100ns or less typically will not generate a reset pulse.
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 6 / 1 4 u m805/811/812 typical operating characteristics (t a = +25c , unless otherwise noted .) vcc=3.3v supply current vs. temperature (um811r e ) power - down reset delay vs. temperature (um811r e ) power - up reset timeout vs. temperature
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 7 / 1 4 u m805/811/812 detailed description reset timing the reset signal is asserted low for the um 811 and high for the um 812 when the power supply voltage falls below the threshold trip voltage and remains asserted for at least 140ms after the power supply voltage has risen above the threshold. figure 1 . reset vs. v cc timing diagram the reset signal is asserted low for the um 811 and high for the um 812 when mr _______ is low and remains asserted for at least 140ms aft er mr _______ is high . figure 2 . reset vs. mr _______ timing diagram reset output a microproces sors (ps) reset input starts the p in a known state. the se p supervisory circuits assert reset to prevent code execution errors during power - up, power - down, or brownout conditions. reset ________ _____ is guaranteed to be a logic low for v cc > 1v. once v cc exceeds the reset threshold, an internal timer keeps reset _____________ low for the reset timeout period; after this inte rval, reset _____________ goes v c c r e s e t v t h v t h t r p r e s e t 5 v 0 v 5 v 0 v 5 v 0 v m r r e s e t t r p t m d t m r r e s e t h i g h l o w v c c 0 v v c c 0 v
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 8 / 1 4 u m805/811/812 high. if a brownout condition occurs (v cc dips below the reset threshold), reset _____________ go es low. any time v cc goes below the reset threshold, the internal timer resets to zero, and reset _____________ goes low. the internal timer starts after v cc returns above the reset threshold, and reset _____________ remains low for the reset timeout period. the manual reset input ( mr _______ ) can also initiate a reset . see the manual reset input section. the um 812 has an active - high reset output that is the inverse of the um 8 05/81 1s reset _____________ output. the um 80 5 uses an open - drain output, and the um 8 11 /81 2 have a push - pull output stage. connect a pull - up resistor on the um 80 5 s reset _____________ output to any supply between 0 and 6v. manual reset input many p - based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. a logic low on mr _______ asserts reset. rese t remains asserted while mr _______ is low, and for the reset active timeout period (t rp ) after mr _______ returns high. this in put has an internal 20k pull - up resistor, so it can be left open if it is not used. mr _______ can be driven with ttl or cmos - logic levels, or with open - drain/collector outputs. connect a normal ly open momentary switch from mr _______ to gnd to create a manual - reset function; external debounce circuitry is not required. if mr _______ is driven from long cables or if the device is used in a noisy environment, connecting a 0.1f capacitor from mr _______ to ground provides additional noise immunity. reset threshold accuracy the um805/ 811/812 are ideal for systems using a 5v5% or 3v5% power supply with ics sp ecified for 5v 10% or 3v 10%, respectively. they are designed to meet worst - case specifications over temperature. the reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range for the system ics. the thresholds are pre - trimmed and exhibit tight distribution, reducing the range over which an undesirable reset may occur.
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 9 / 1 4 u m805/811/812 applications information negative - going v cc transients in addition to issuing a reset to the p during power - up, power - down, and brownout conditions, the um 80 5 / 81 1/812 are relatively immune to short - duration negative - going v cc transients (glitches). figure 3 shows typical transient duration vs. reset comparator overdrive, for which the um 80 5 /81 1 /8 1 2 do not generate a reset pulse. the graph was generated using a negative - going pulse applied to v cc , starting above the actual reset threshold and ending below it by the magnitude indicated (reset comparator overdrive). the graph indicates the typical ma ximum pulse width a negative - going v cc transient may have without causing a reset pulse to be issued . as the magnitude of the transient increases (goes farther below the reset threshold), the max imum allowable pulse width decreases. typically, for the um8_ _l e /m e /j e , a v cc transient that goes 1 25 mv below the reset threshold and lasts 4 0s or less will not cause a reset pulse to be issued. a 0.1f capacitor mounted as close as possible to the v cc provides additional transient immunity. figure 3 . maximum transient duration w ithout c ausing a reset pulse vs . reset comparator overdrive ensuring a valid reset ______________ output down to v cc = 0v when v cc falls below 1v, the um 811 reset _____________ output no longer sinks current it becomes an open circuit. therefore, high - impedance cmos - logic inputs connected to reset _______ ______ can drift to undetermined voltages. this presents no problem in most applications since most p and other circuitry is inoperative with v cc below 1v. however, in applications where reset _____________ must be valid down to 0v, adding a pull - down resistor to reset _____________ pin will causes any stray leakage currents to flow to ground, holding reset _____________ low ( figure 4 ). r1s value is not critical; 100k is large enough not to load reset _____________ and small enough to pull reset _____________ to ground. a 100 k pull - up resistor to v cc is also recommended for the um 81 2 if reset is required to remain valid for v cc < 1v. um8_ _le/me/je um8_ _ t e/ s e/ r e /ze
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 10 / 1 4 u m805/811/812 figure 4 . reset ____________ valid to v cc = ground circuit interfacing to ps with bidirectional reset pins ps with bidirectional r eset pins (such as the motorola 68hc11 series) can contend with the um 811/812 reset outputs. if, for exa mple, the um 811 reset ______________ output is asserted high and the p wants to pull it low, indeterminate logic levels may result. to correct such cases, connect a 4.7k resistor between the um 811 reset ______________ (or um 812 reset) output and the p reset i/o (figure 5 ). buffer the reset output to other system components. figure 5 . interfacing to ps with bidirectional reset i/o b u f f e r v c c v c c u m 8 1 1 r e s e t g n d 4 . 7 k v c c p r e s e t g n d b u f f e r e d r e s e t t o o t h e r s y s t e m c o m p o n e n t s
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 11 / 1 4 u m805/811/812 um 80 5 open - drain reset ______________ output allows use with multiple supplies generally, the pull - up connected to the um 80 5 will connect to the supply vol tage that is being monitored at the ics v cc pin. however, some systems may use the open - drain output to level - shift from the monitored supply to reset circuitry powered by some other supply (figure 6 ). note that as the um 80 5 s v cc decreases below 1v, so d oes the ics ability to sink current at reset ______________ . also, with any pull - up, reset ______________ will be pulled high a s v cc decays toward 0. the voltage where this occurs depends on the pull - up resistor value and the voltage to which it is connected. figure 6 . um805 open - drain reset ____ __________ output allows use with multiple supplies 3 . 3 v v c c u m 8 0 5 r e s e t g n d r p u l l - u p v c c 5 v s y s t e m r e s e t g n d 5 . 0 v
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 12 / 1 4 u m805/811/812 package information um 805/811/812 sot143 outline drawing dimensions symbol m illimeters i nches min max min max a 0.763 1.220 0.031 0.049 a1 0.013 0.150 0.001 0 .006 a2 0.750 1.070 0.030 0.043 b 0.300 0.510 0.012 0.020 b2 0.760 0.930 0.030 0.037 c 0.080 0.200 0.003 0.008 d 2.800 3.040 0.112 0.122 e 2.200 2.640 0.088 0.211 e1 1.200 1.400 0.048 0.056 e 1.920bsc 0.077bsc e1 0.200bsc 0.008bsc l 1 0.540ref 0.0 22 l 0.400 0.600 0.016 0.024 land pattern notes: 1. compound dimension: 2.90 1. 30 ; 2. unit: mm; 3. general tolerance 0.05mm unless otherwise specified; 4. the layout is just for reference. tape and reel o rientation 1 2 3 4 e e 1 e 1 e d b 2 b a 2 a c l 1 l a 1 t o p v i e w e n d v i e w s i d e v i e w 0 . 9 0 0 . 5 0 1 . 9 2 0 . 8 0 0 . 2 0 x x x m
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 13 / 1 4 u m805/811/812 selection table part number reset threshold (v) timeout period (ms) output type marking code package type shipping qty um805l e 4.63 240 open - drain, active low 05l sot143 3000pcs/7inch tape & reel um805m e 4. 38 240 open - drain, active low 05m um805j e 4.00 240 open - drain, active low 05j um805t e 3.08 240 open - drain, active low 05t um805s e 2.93 240 open - drain, active low 05s um805r e 2.63 240 open - drain, active low 05r um805z e 2.32 240 open - drain, ac tive low 05z um811l e 4.63 240 push - pull, active low 11l um811m e 4.38 240 push - pull, active low 11m um811j e 4.00 240 push - pull, active low 11j um811t e 3.08 240 push - pull, active low 11t um811s e 2.93 240 push - pull, active low 11s um811r e 2. 63 240 push - pull, active low 11r um811z e 2.32 240 push - pull, active low 11z um812l e 4.63 240 push - pull, active high 12l um812m e 4.38 240 push - pull, active high 12m um812j e 4.00 240 push - pull, active high 12j um812t e 3.08 240 push - pull, activ e high 12t um812s e 2.93 240 push - pull, active high 12s um812r e 2.63 240 push - pull, active high 12r um812z e 2.32 240 push - pull, active high 12z
________________________________________________________________________ http://www.union - ic.com rev.0 1 jan .20 1 5 14 / 1 4 u m805/811/812 important notice the information in this document has been carefully reviewed and is believed to b e accurate. nonetheless, this document is subject to change without notice. union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no co mmitment to update or to keep current the contained information, or to notify a person or organization of any update. union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the be st product possible. union semiconductor, inc add : unit 606, no.570 shengxia r oa d, shanghai 2012 10 tel: 021 - 5109 3966 fax: 021 - 51026018 website: www.union - ic.com


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